飞思卡尔中国

中国是飞思卡尔全球战略的重要一环，中国市场的繁荣与飞思卡尔的发展休戚相关。飞思卡尔在中国的业务始于1992年，目前在中国拥有3800名员工，并在天津设有一座封装测试工厂，是飞思卡尔在全球拥有的两个大型芯片测试和封装工厂之一。飞思卡尔在中国建有五个研发中心，分别位于北京、天津、苏州、上海和成都，并在北京、上海、深圳、青岛设有四个销售办事处。 飞思卡尔天津封装测试厂 天津工厂成立于1992年，是飞思卡尔拥有的两个大型芯片测试和封装工厂之一。该工厂占地400,000平方英尺，从2001年开始投入生产。 工厂每周生产超过900万个微控制器、混合信号和射频设备。 该工厂目前拥有超过2700名员工。 客户包括摩托罗拉的个人通讯事业部，以及其它的消费和汽车电子厂商。 天津工厂生产飞思卡尔的最新集成电路（IC）封装解决方案、功率四方扁平无引脚（PQFN）封装，适用于汽车和其它高流量、高功耗应用，主要封装技术包括：铸造阵列处理球栅阵列（MAPBGA）、无铅方形扁平封装（QFN）、小外形集成电路（SOIC）、薄型四方平面封装（LQFP）、塑料双列直插式封装（PDIP）、收缩型双列直插式封装（SDIP）和射频组件。

设计中心 飞思卡尔北京设计中心 专注于未来技术，用于半导体设备、工艺建模和模拟、工艺/设备开发和晶圆厂支持，另外还致力于高级半导体材料研究和相关软件开发。 飞思卡尔苏州设计中心 创建于1998年，是中国首个国家级IC设计中心，目前拥有160多名员工。 苏州设计中心服务于全球和中国客户，包括高级音频、视频、连接技术领域，覆盖消费品、无线和汽车市场。 苏州设计中心主要有汽车和标准产品部门、无线和移动系统部门、手机部门在内的三个研发部门。 飞思卡尔天津集成电路设计有限公司 该公司是飞思卡尔和天津强芯半导体芯片设计有限公司的合资公司。公司拥有40多名研发和设计人员，90%以上拥有研究生学历。 公司的业务涉及数字、模拟设计、布局、EDA维护和系统应用，并提供完整的系统培训，包括整个设计流程的海外培训。 飞思卡尔上海 (张江) 创新中心 在以下方面向全球客户提供优质的服务与支持： 汽车电子－专注于低成本、低电压、基于闪存的嵌入式微控制器，24位DSP以及汽车电子产品、系统及解决方案。 多媒体应用－专注于多媒体应用处理器的研发，2.5G和3G基带处理器并提供系统设计、IC设计和应用软件的完全解决方案。 无线应用－支持无线手机平台，专注于2G/2.5G GSM平台开发。 网络和计算应用－专注于网络应用的开发和支持。 飞思卡尔成都设计中心 在以下方面向全球客户提供优质的服务与支持： 该中心于2007年正式成立，是飞思卡尔TD-SCDMA技术研发力量的核心所在，并且积极地致力于下一代RF产品的研发，同时，该中心推动了飞思卡尔先进的QUICC Engine™架构的微码技术的发展。 这个世界级的研发中心是飞思卡尔十五年来持续投资中国和技术引进的最新成果，该研发中心将极大地服务至关重要的亚洲市场，并且通过高度创新的产品，支持全球客户。 飞思卡尔的大学计划 飞思卡尔的大学计划始于1993年，至今已与中国21所大学开展了合作项目。同时，飞思卡尔在中国设立了16个处理器教学实验中心（MTC）和5个处理器开发应用研究中心(MAC)并资助多个研究项目。 此外，飞思卡尔积极与政府开展合作并与中国信息产业部旗下的分支机构－国家软件与集成电路公共服务平台(CSIP)合作建立Linux联合评估实验室，研发基于Linux操作系统和飞思卡尔 Power ArchitectureTM处理器的计算平台。 加入理由 1.我们的产品使得世界多姿多彩 目前，公路上行驶的轿车和卡车中，有40%的车辆安全气囊、防抱死制动、舒适装置、发动机管理、节油与尾气控制、仪表、导航、无线电或胎压监控系统采用飞思卡尔解决方案。 飞思卡尔半导体器件使全球无数家庭和办公室的报警系统、音频系统、电器、台式和笔记本电脑、键盘、鼠标、监视器、网络存储与游戏设备、打印机、遥控装置和电子玩具实现了智能化。 在互联网，您的大量数据同样利用飞思卡尔芯片进行传输。这是因为飞思卡尔是世界领先的通信处理器供应商。在无线通信方面，飞思卡尔芯片广泛配置在各种手机、个人数字助理及移动游戏设备中。 在工业和商用领域，飞思卡尔产品为电机控制、工艺流程管理、测量设备和售点设备提供有力支持。我们的产品使世界变得多姿多彩。 2.创新技术 飞思卡尔技术实力雄厚并且深刻了解面向客户创新的重要性。到目前为止，我们已获得超过5400项专利。这种知识产权许可业务为我们创造了可观的收入，从而有助于我们加大研发的资金投入。事实上，近三年来，我们每年将10亿美元用于研发。我们的员工中近四分之一专门从事研发工作。我们不断与客户紧密合作，富有前瞻性地制定明确的、有竞争力的产品路线图。 3.领先的客户 我们直属销售团队拥有100多家领先的原始设备制造商（OEM）客户，同时我们还通过著名的分销商为大量终端用户提供服务，我们的全球客户群包括超过10,000名的终端用户。 4.全球资源 飞思卡尔拥有丰富的经验和经济实力，可为员工的成功提供必要的工具、服务和支持。飞思卡尔是一个资源丰富的全球团队： 美国以外地区的员工占总数50%以上 亚太地区员工占总数的38% 欧洲地区员工占总数近20% 在美国拥有60多个生产机构，欧洲/中东/非洲地区(EMEA)有40多个生产机构，亚太地区30多个 在24个国家设有69个销售机构 回到顶部    5.光明前景 我们的目标是成为互连世界中嵌入式处理技术的领导者。我们与客户开展广泛合作，以更加智能、快速、无缝联结的设备、系统和网络共同建立未来更加美好的世界。我们致力于提高智能运算化水平和互通能力，应用于您所能想象的各种环境中，世界对这些的需求日益提高。从发展机遇的角度看，我们正处于半导体工业的鼎盛时期。 6.卓越人才 这是一个推动技术不断创新的团队，是一个由世界上最具竞争耐力的出色人员组成的团队。这个团体中的成员具有极高的天分、积极、合作、敬业、富于想象、勇担风险并且是兢兢业业的实干家。飞思卡尔成功的秘密是我们拥有出色的员工。 作为公认的理想工作单位，飞思卡尔将传统的高素质工作环境提升到全新水平。员工精神饱满，预期前景光明，彼此团结一心。在这理想的工作环境中，人们在世界上最著名的技术团队中创造着历史。 7.绩效奖励机制 飞思卡尔根据公司及个人绩效实行具有市场竞争力的综合奖励机制（工资及福利）。同时，当个人及公司业绩优于市场标准时，薪酬可高于市场总体水平。总体薪酬包括基本工资、奖金、股本收益与福利。这种基于市场业绩的付酬奖励机制有助于提高员工的绩效水平，使我们共同分享飞思卡尔的成果。 8.出色的企业文化 飞思卡尔企业文化以六项文化为基础指导我们工作： 创新.利用我们雄厚的实力成为技术领导者。 客户至上.持续和客户建立长期双赢的合作关系。 无暇道德规范.致力于成为业界最具道德规范的企业。 卓越人才.吸引并发展世界一流的多样化员工队伍，战略性地协调我们的团队。 主人翁意识.勇于负责并分享我们决策和执行的成功。 这些原则综合在一起，必将使您全面融入高效的团队中，不断创新产品帮助我们的客户取得成功。 招募职位 个人求职中心点击进入 Shanghai(Zhang Jiang) Innovation Center Title: Embedded Software Development Engineer Location: Shanghai Scope of Responsibilities: Develop SW in Freescale i.MX series application processor (ARM-9, ARM-11, ARM-12 based). Assignment will include but not limit to WinCE or Linux based BS development Audio/video/image codec development Multimedia middleware development Application development and etc Develop SW test framework or automation tool. Assignment will include but not limit to WinCE BSP test case development and maintenance Linux BSP test case development and maintenance Multimedia test framework development and maintenance Codec automation test framework development and maintenance Application engineering Interface with customer to do requirement collection and analyzing Issue/bug diagnostic Issue/bug fixing SW build and release management Specific Knowledge/Skills: ·Preferred Degree: Master or above ·Preferred Major: Electronic Engineering, Computer Science, Automation, Application physics, Application mathematics and etc ·Preferred English level: CETS-6 as mandatory ·Preferred Project Experience: Linux background project experience WinCE background project experience Other embedded project experience SW test or tool development ARM based processor experience Audio/video/image codec experience Suzhou Design Center Title: IC Front-end Engineer Location: Suzhou Scope of Responsibilities: ·Responsible for IC digital designs by high level languages (e.g. Verilog/VHDL, C) with the followings: ·IP/Module development by Verilog coding and C modeling where necessary, doing simulations, synthesis, create module block guide and module/chip level verifications. ·Digital IC designs primarily focused on MCU products, play partial or full role in SOC design area includes RTL code using Verilog HDL, functional verification, synthesis, DFT, ATPG, formal verification, Power analysis, clock & reset strategy, top-level integration and timing closure. ·New design methodology exploring for both SOC projects and IPs. ·Work closely with product engineer to do test patterns generation/conversion/debugging and deliver final test patterns to product engineer. ·Participate in the system architecture definition and work as a global team to do complex SOC design based on embedded MCU Specific Knowledge/Skills: ·Master and PhD Degree in Electronic, Communication and Microelectronics Engineering. ·Good English reading, writing, good verbal English is preferred ·Relevant project experience in digital designs based on high-level languages, either in ASIC or FPGA, with basic knowledge of digital design flow, including coding, simulation, synthesis, DFT, STA, test. ·Relevant experience in the area of embedded processors, MCU is a big plus. ·Familiar with main EDA tools, such Synopsys, Cadence and Mentor. Good grasp of Verilog/VHDL, C/C++ and Perl/TCL scripts in Linux/Unix environment. ·Strong teamwork sense, good communication skills and strong self-motivation is required Title: IC Backend Design Engineer Location: Suzhou Scope of Responsibilities: ·Responsible for physical synthesis, clock tree synthesis, STA and final timing closure. ·Also as a layout engineer, he/she will be responsible for floorplan generation, power planning, P&R, DRC/LVS and final GDS tape out. ·Also need to attack signal integrity issues (IR drop, cross-talk) under deep submicron process. ·Design for manufacture analysis and optimization Specific Knowledge/Skills: ·BS/higher Degree in Electronic, Communication and Microelectronics Engineering. ·Good English reading, writing, good verbal English is preferred ·Relevant project experience in IC designs, with basic knowledge of digital design flow, including synthesis, STA and physical implementation. ·Good knowledge/background in the MCU is a big plus. ·Relevant experience in the area of embedded processors, MCU is a big plus. ·Familiar with main EDA tools, Cadence and Mentor. Good grasp of Verilog/VHDL, C/C++ and Perl/TCL scripts in Linux/Unix environment. Tianjin FSQX IC Design Center Title: SoC CAD Layout Engineer Location: Tianjin Scope of Responsibilities: Perform backend work, including but not limited to Floorplan, Clock Tree Synthesis, Placement, Route, Extraction, Signal Integrity, IR drop, Timing, optimization, Static Timing Analysis, Design For Manufacturing, Physical verification. Specific Knowledge/Skills: ·M.S. degree in Electrical Engineering or equivalent. ·Good command of English both in writing and speaking, CET4 ·Backend hands on experience and flow understanding. ·Fast learner, good team player, willing to work with others Title: IC Design Verification Engineer Location: Tianjin Scope of Responsibilities: ·Contributes to project verification plan development for SOC end to end testing following IP integration. ·Contributes to verification testbench design and implementation for Verilog and System Verilog solutions. ·Expands upon a coverage driven constrained random test suite development methodology. ·Extensive test development, debug and coverage analysis to identify all design defects. ·Heavily involved or leading functional and gate simulation efforts using Cadence and Synopsys tools. ·May perform other duties in areas of digital design, synthesis and timing analysis as individual skills enable contributions in these areas. Specific Knowledge/Skills: ·Bachelor or above in Electronic, Communications, Microelectronics Engineering and Computer Science ·Must be able to communicate in both written and spoken English, CET4 ·Experience in digital design based on high-level languages, with knowledge of IC design flow, including coding, simulation, verification, synthesis, DFT and STA ·Good communication skills and the ability to work well as a team ·Knowledge in Verilog, testbench architecture, verification flow ·Knowledge of formal verification is a bonus ·Familiar with mainstream EDA tools from Synopsis, Cadence and Mentor, like NC-Verilog, VCS, DC/PC, RC, PrimeTime, Fastscan and so on ·Languages: Verilog, C/C++, System Verilog, Perl/TCL, UNIX scripting Tianjin TSPG NPI Title: Product Engineer Location: Tianjin Scope of Responsibilities: ·Work with Design, Device, Test, Application, Process and QA Engineers, to evaluated new product and new Wafer Fab and Assembly process ·Perform and coordinate Reliability and Electrical test and Failure verification and Failure Analysis on the products ·Develop, evaluate, and improve manufacturing methods, utilizing knowledge of product design, materials and parts, fabrication processes, tooling and production capabilities, assembly methods and quality control standards. Work flexible hours as required to meet project deadlines and manage department ·Specification Configuration and management ·Administrative product management (iDDCM, Tandem…) ·Build and maintain traceability matrix ·Participate in DFMEA ·Manage characterization and qualification plan definition ·Evaluate test coverage ·Drive product characterization: collect and analyze data from lab and final test ·Perform product qualification: reliability tests, ESD, Latch-up, etc… ·Set up production tools in final test (burn-in, ATE, dash boards…) ·Prepare CAB sessions and PPAP documents ·Manage yield improvement, zero defect plans (PAT, SBL, JVT…) and Production ramp up and sustaining ·CQI investigations (ATE test, lab analysis and FA lab follow up) ·Use problem solving tools: 8D, FTA Specific Knowledge/Skills: ·BS Degree or above in electronics engineering ·Good command of English both in writing and speaking in a global working environment, CET4 ·Strong Analog Electronics competences with power device skills and automotive environment knowledge preferred ·Basic statistical knowledge is a must, while having experience on SPC(Statistic Process Control) is a plus ·Strong synthesis and analysis skills ·Test instrumentation techniques and methodology is a must ·Hard working and diligent, good team work spirit Tianjin Manufactory Title: Equipment Engineer Location: Tianjin Scope of Responsibilities: ·Regular equipment maintenance and continues improvement ·Keep product line equipment run efficiently ·Analyze and resolve problem with equipment to reach zero defect ·Coordinate with equipment supplier to improve equipment capacity Specific Knowledge/Skills: ·Bachelor degree or above in Mechanical or Automation related major ·Good command of English both in writing and speaking, CET4 ·Hard working and diligent, good team work spirit Title: Process Engineer Location: Tianjin Scope of Responsibilities: ·Optimize semiconductor production process and parameter ·Evaluate and improve performance of raw material ·Develop new process and product Specific Knowledge/Skills: ·Bachelor degree or above in Mechanical, Automation, Material related major ·Good command of English both in writing and speaking, CET4 ·Be familiar with mechanic and electronic knowledge, process improvement ·Ability of independent working and innovation ·Hard working and diligent, good team work spirit Chengdu Design Center Title: Systems & Applications Engineering –DSP Location: Chengdu Scope of Responsibilities: ·Development, testing, documentation and support of DSP applications as a contributing member of the DSP team in Chengdu. There is special emphasis on regional focus (China, Korea, etc) to this support. ·The Generation/Publishing of benchmark results and Application Notes that illustrate the performance available from Freescale Digital Signal Processing (DSP) solutions. ·Provide the first level of support for regional FAEs and AEs involved in DSP design win efforts. Specific Knowledge/Skills: ·Degree in Computer Science, Electronic/Microprocessor Engineering, or similar discipline. ·Exposure to Microprocessor/DSP embedded software systems and/or embedded applications development. ·Awareness of the 3G wireless market and equipment is an advantage. ·Solid understanding of communication systems, experience in networking technology such as broadband access and CPE would be an advantage. TD-SCDMA experience preferred. ·A strong embedded software and operating system background, demonstrable Linux/RTOS knowledge is an advantage. Experience in Linux kernel-space programming is very desirable. ·Domain knowledge of Communications protocols, Linux Kernel. ·Functional command of Spoken/Written English. Title: Systems & Applications Engineering –QUICC Engine™ Location: Chengdu Scope of Responsibilities: ·Development, testing, documentation and support of microcode and the associated driver for Freescale PowerQuicc Communication Processor. ·To provide technical support to internal/external customers in microcode, upper level software and application development. ·Able to work with cross functional teams from different regions during the development process. ·To deliver technical training on PowerQuicc Communication Processor processors to internal/external customers. Specific Knowledge/Skills: ·Degree in Computer Science, Electronic/Microprocessor Engineering, or similar discipline. ·Exposure to Microprocessor/DSP embedded software systems and/or embedded applications development. ·Awareness of the 3G wireless market and equipment is an advantage. ·Solid understanding of communication systems, experience in networking technology such as broadband access and CPE would be an advantage. TD-SCDMA experience preferred. ·A strong embedded software and operating system background, demonstrable Linux/RTOS knowledge is an advantage. Experience in Linux kernel-space programming is very desirable. ·Domain knowledge of Communications protocols, Linux Kernel. ·Functional command of Spoken/Written English. ·Occasional travel to work at customer site is required. 校园宣讲 日期 城市 时间 学校 容纳人数 地点 2007-10-30 哈尔滨 18:30 哈尔滨工业大学 500 工大活动中心 2007-11-2 南京 18:30 东南大学 200 榴园新华厅 2007-11-5 西安 19:00 西安电子科技大学 300 图书馆3楼报告厅 2007-11-8 上海 18:30 同济大学 180 国际会议中心312 2007-11-9 14:00 上海交通大学 300 包玉刚5楼讲演厅 2007-11-12 成都 15:00 电子科技大学 500 夏新厅 2007-11-14 杭州 18:00 浙江大学（玉泉校区） 250 邵逸夫科学馆一楼报告厅 薪酬 作为业界领先的半导体制造及研发企业，飞思卡尔拥有完善的薪酬福利理念及体系。我们紧紧把握市场脉搏，为优秀人才提供具有竞争力的薪酬待遇；我们着重于绩效收入，从中强化以高效业绩驱动的付薪原则，并建立旨在留用公司所需人才的薪资结构以及级别设置。业绩突出的员工还有机会获得股票期权等长期激励项目。

上海浦东的...很不错滴哦....